members >> Jo, Jihyuck

PERSONAL DATA

photo
  • Jo, Jihyuck
  • Date of Birth: January 29, 1991 (the solar calendar)
  • Place of Birth: Daejeon, Korea
  • Hobbies: Swimming, Badminton, Watching Movies
  • Tel.: +82-42-351-9884
  • E-mail:

EDUCATIONAL BACKGROUND

  • KAIST: Electrical Engineering Ph.D. (2014.3~)
  • KAIST: Electrical Engineering M.S. (2012.2~2014.2)
  • KAIST: Electrical Engineering B.S. (2008.2~2012.2)
  • Daejeon Science High School (2006.3~2008.2)
  • Daejeon Noeun Middle School (2003.3~2006.2)
  • Daejeon Sangji Elementary School (2001.3~2003.2)
  • Daejeon Munjeong Elementary School (1997.3~2001.2)

INTERESTS

  • Digital Integrated Circuits
  • Neural Network Accelerators
  • Microprocessors
  • Hardware Design for ECC Blocks

PAPERS

    INTERNATIONAL JOURNAL PAPERS

    1. [Accepted] Jihyuck Jo, Soyoung Cha, Dayoung Rho, and In-Cheol Park, "DSIP: A Scalable Inference Accelerator for Convolutional Neural Networks," IEEE Journal of Solid-State Circuits.
    2. Injae Yoo, Jihyuck Jo, Youngjin Ju, and In-Cheol Park, "Unidirectional Ring Ethernet and Media Access Controller with Automatic Relaying for Low-Complexity In-Vehicle Control Network," Journal of Semiconductor Technology and Science, vol. 17, no. 5, pp. 697-708, Oct. 2017.
    3. Jihyuck Jo, and In-Cheol Park, "Low-Latency Low-Cost Architecture for Square and Cube Roots," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E100-A, no. 9, pp. 1951-1955, Sep. 2017.
    4. Jihyuck Jo, Hoyoung Yoo, and In-Cheol Park, "Energy-Efficient Floating-Point MFCC Extraction Architecture for Speech Recognition Systems," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 2, pp. 754-758, Feb. 2016.
    5. Byeong Yong Kong, Jihyuck Jo, Hyewon Jeong, Mina Hwang, Soyoung Cha, Bongjin Kim, and In-Cheol Park, "Low-Complexity Low-Latency Architecture for Matching of Data Encoded With Hard Systematic Error-Correcting Codes," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 22, no. 7, pp. 1648-1652, Jul. 2014.
    6. Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo, and In-Cheol Park, "Area-Efficient Multi-Mode Encoding Architecture for Long BCH Codes," IEEE Transactions on Circuits and Systems II:Express Briefs, vol. 60, no. 12, pp. 872-876, Dec. 2013.
    7. Youngjoo Lee, Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo and In-Cheol Park, "A 2.74pJ/bit, 17.7Gb/s Iterative Concatenated-BCH Decoder in 65nm CMOS for MLC NAND Flash Memory," IEEE Journal of Solid-State Circuits, vol. 48, no. 10, pp. 2531-2540, Oct. 2013.

    DOMESTIC JOURNAL PAPERS

    1. Youngjoo Lee, Jihyuck Jo and In-Cheol Park, "Core-A: High-performance 32-bit embedded RISC processor," The Magazine of the IEEK, vol. 40, no. 9, pp. 34-41, Sep. 2013.

    DOMESTIC CONFERENCE PAPERS

    1. Youngjoo Lee, Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo and In-Cheol Park, "A 7.34Gb/s (70528, 65536) Concatenated-BCH Encoder Using Two-Dimensional Encoding Scheme," IEEK Summer Conference 2013
    2. Jihyuck Jo, Hoyoung Yoo, Soyoung Cha and In-Cheol Park, "Optimization of Floating-Point Bit-Width for MFCC Feature Extraction," IEEK Summer Conference 2013
    3. Dong Joon Yoon, Hoyoung Yoo, Jihyuck Jo, and In-Cheol Park, "Implementation of AT91SAM9XE (ARM926EJ-S) Processor Simulator Using QEMU," 2012 IEEK Summer Conference, Jeju, Korea, Jun. 2012

CHIP DESIGN CONTESTS

  1. Hoyoung Yoo, Jihyuck Jo, and In-Cheol Park, "Efficient 32-Bit Real-Time Embedded Platform for IoT Systems," IEEE International SoC Design Conference 2014 (ISOCC 2014) Chip Design Contest, Jeju, Korea, Nov. 2014.
  2. Youngjoo Lee, Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo, and In-Cheol Park, "Energy-Efficient High-Throughput Iterative Concatenated-BCH Decoder for MLC Flash Memory," IEEE International SoC Design Conference 2013 (ISOCC 2013) Chip Design Contest, Busan, Korea, Nov. 2013.

PATENTS

  1. [Pending] Injae Yoo, Jihyuck Jo, and In-Cheol Park, "Image Processor and Display Device," Korea 10-2015-0137915
  2. Byeong Yong Kong, Jihyuck Jo, Soyoung Cha, Hyewon Jeong, Mina Hwang, Bongjin Kim, and In-Cheol Park, "Tag Matching Device and Tag Matching System Including the Same," Korea 10-1559439
  3. Youngjoo Lee, Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo, and In-Cheol Park, "Concatenated BCH Decoder and Concatenated BCH Decoding Method," Korea 10-1512361
  4. Byeong Yong Kong, Jihyuck Jo, Mina Hwang, Hyewon Jeong, Soyoung Cha, and In-Cheol Park, "Method for Managing Coherence, Coherence Management Unit, Cache Device and Semiconductor Device Including the Same," Korea 10-1446924
  5. Youngjoo Lee, Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo and In-Cheol Park, "Concatenated BCH Encoding Circuit, Storage Device and Storage System Including the Same," Korea 10-1433672
  6. Dong Joon Yoon, Jihyuck Jo, and In-Cheol Park, "Virtual Board Platform, SOC Simulating Device, Method of Simulating SOC and Method of Verifying SOC," Korea 10-1412576

HONORS AND AWARDS

  1. Excellence in Research, 2017
    - School of Electrical Engineering, KAIST
  2. Excellence in Research, 2016
    - School of Electrical Engineering, KAIST
  3. Altera Design Contest, 2016
    - The Excellence Award
    - Injae Yoo, Jihyuck Jo, Youngjin Ju and In-Cheol Park, "Fault-Tolerant Automotive Network Platform"
  4. Qualcomm Innovation Award, 2015
    - Hoyoung Yoo, Jihyuck Jo, and In-Cheol Park, "Energy-Efficient VLSI Architecture for HMM-based Isolated Word Recognition"
  5. Altera Design Contest, 2014
    - The First Place
    - Hoyoung Yoo, Jihyuck Jo, and In-Cheol Park, "Speech Recognition for Automobile Systems"
    - Presentation
  6. IEEE International SoC Design Conference 2014 (ISOCC 2014)
    - Chip Design Contest Best Demo Award
    - Hoyoung Yoo, Jihyuck Jo, and In-Cheol Park, "Efficient 32-Bit Real-Time Embedded Platform for IoT Systems"
  7. IEEE International SoC Design Conference 2013 (ISOCC 2013)
    - IEEE SSCS Seoul Chapter Best Demo Award
    - Youngjoo Lee, Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo, and In-Cheol Park, "Energy-Efficient High-Throughput Iterative Concatenated-BCH Decoder for MLC Flash Memory"

EXPERIENCE

  • University of California, Los Angeles - Summer Session
    - 2009 Summer
  • Korea Institute of Science and Technology - Internship
    - 2010 Summer
  • Qualcomm IT Tour - Visiting Student
    - 2012 Summer
    - Qualcomm Headquarters R&D Center, San Diego, CA, USA

 

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