members >> Lee, YoungJoo

PERSONAL DATA

photo
  • Lee, Youngjoo
  • Date of Birth: May 21, 1985
  • Place of Birth: DaeJeon, Korea
  • Hobbies: Music, Soccer
  • Tel.: +82-42-351-9880
  • E-mail:

EDUCATIONAL BACKGROUND

  • KAIST: Electrical Engineering Ph.D. (2010.2~2014.2)
  • KAIST: Electrical Engineering M.S. (2008.2~2010.2)
  • KAIST: Electrical Engineering B.S (2003.3~2008.2)
  • DaeJeon Science High School (2001.3~2003.2)
  • DaeJeon DaeDeok Middle School (1998.3~2001.2)
  • DaeJeon DaeDeok Elementary School (1992.3~1998.2)

INTERESTS

  • Computer Architecture Design
  • Hardware Design for Multimedia Systems
  • Hardware Design for ECC blocks
  • Analog-to-Digital Converter Design

PAPERS

    INTERNATIONAL JOURNAL PAPERS

    1. Youngjoo Lee, Taehyoun Oh, and In-Cheol Park, "Mismatch-tolerant capacitor array structure for junction-splitting SAR analog-to-digital conversion," IEIE Journal of Semiconductor Technology and Science, vol. 17, no. 3, pp. 387-399, Jun. 2017.
    2. Hoyoung Yoo, Youngjoo Lee, and In-Cheol Park, "Low-Power Parallel Chien Search Architecture Using Two-Step Approach," IEEE Trans. Circuits and Syst. II, Exp. Briefs, vol. 63, no. 3, pp. 269-273, Mar. 2016.
    3. Youngjoo Lee, Jaehwan Jung, and In-Cheol Park, "Energy-scalable 4KB LDPC decoding architecture for NAND-flash-based storage systems," IEICE Transactions on Electronics, vol. E99-C, no. 2, pp. 293-301, Feb. 2016.
    4. Jaehwan Jung, Hoyoung Yoo, Youngjoo Lee, and In-Cheol Park, "Efficient Parallel Architecture for Linear Feedback Shift Registers," IEEE Trans. Circuits and Syst. II, Exp. Briefs, vol. 62, no. 11, pp. 1068-1072, Nov. 2015.
    5. Youngjoo Lee, Bongjin Kim, Jaehwan Jung, and In-Cheol Park, "Low-complexity tree architecture for finding the first two minima," IEEE Transactions on Circuits and Systems II:Express Briefs, vol. 62, no. 1, pp. 61-64, Jan. 2015.
    6. Jaehwan Jung, Youngjoo Lee, and In-Cheol Park, "Area-efficient method to approximate two minima for LDPC decoders," Electronics Letters, vol. 50, no. 23, pp. 1701-1702, Nov. 2014.
    7. Y. Lee and I.-C. Park, "Single-step glitch-free NAND-based digitally controlled delay lines using dual loops," IET Electronics Letters, vol. 50, no. 13, pp. 930-932. June 2014.
    8. Youngjoo Lee, Hoyoung Yoo, Injae Yoo, and In-Cheol Park, "High-throughput and low-complexity BCH decoding architecture for solid-state drives," IEEE Transactions on Very Large Scale Integration Systems, vol. 22, no. 5, pp. 1183-1187, May, 2014.
    9. Youngjoo Lee, Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo, and In-Cheol Park, "A 2.74-pJ/bit, 17.7-Gb/s iterative concatenated-BCH decoder in 65-nm CMOS for MLC NAND flash memory," IEEE Journal of Solid-State Circuits, vol. 48, no. 10, pp. 2531-2540, Oct. 2013.
    10. Youngjoo Lee, Hoyoung Yoo, and In-Cheol Park, "Low-complexity parallel Chien search structure using two-dimensional optimization," IEEE Transactions on Circuits and Systems II:Express Briefs, vol. 58, no. 8, pp. 522-526, Aug. 2011.
    11. Hoyoung Yoo, Youngjoo Lee, and In-Cheol Park, "Area-efficient syndrome calculation for strong BCH decoding," Electronics Letters, vol. 47, no. 2, pp. 107-108, Jan. 2011.
    12. Tae-hwan Kim, Young-Joo Lee, and In-Cheol Park, "A scalable and programmable sound synthesizer,"IEEE Transactions on Very Large Scale Integration Systems, vol. 18, no. 6, pp. 875-886, June 2010.

    INTERNATIONAL CONFERENCE PAPERS

    1. [Accepted] Seokha Hwang, Jaehwan Jung, Daesung Kim, Jeongseok Ha, In-Cheol Park, and Youngjoo Lee, "An Energy-Optimized (37840, 34320) Symmetric BC-BCH Decoder for Healthy Mobile Storages," IEEE Asian Solid-State Circuits Conference (ASSCC 2018), Seoul, Republic of Korea, to be published.
    2. Hoyoung Yoo, Youngjoo Lee, and In-Cheol Park, "7.3 Gb/s universal BCH Encoder and Decoder for SSD Controllers," 19th Asia and South Pacific Design Automation Conference (ASP-DAC 2014), Singapore, Jan. 2014, pp. 37-38.
    3. Youngjoo Lee, Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo, and In-Cheol Park, "Energy-efficient high-throughput iterative concatenated-BCH decoder for MLC flash memory," IEEE International SoC Design Conference 2013 (ISOCC 2013) Chip Design Contest, Busan, Korea, Nov. 2013.
    4. Hoyoung Yoo, Youngjoo Lee, and In-Cheol Park, "7.3Gb/s universal BCH encoder for SSD controllers," IEEE International SoC Design Conference 2013 (ISOCC 2013) Chip Design Contest, Busan, Korea, Nov. 2013.
    5. Youngjoo Lee, Hoyoung Yoo, and In-Cheol Park, "A 3Gb/s 2.08mm2 100b error-correcting BCH decoder in 0.13um CMOS process," 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013), Yokohama, Japan, Jan. 2013, pp. 85-86.
    6. Hoyoung Yoo, Youngjoo Lee, and In-Cheol Park, "Low-latency area-efficient decoding architecture for shortened ReedSolomon codes," IEEE International SoC Design Conference 2012 (ISOCC 2012), Jeju, Korea, Nov. 2012, pp. 223-226.
    7. Youngjoo Lee, Bongjin Kim, and In-Cheol Park, "A 870MHz 0.09mm2 0.45mW/MHz 32b embedded processor using 65nm CMOS technology," IEEE International SoC Design Conference 2012 (ISOCC 2012) Chip Design Contest, Jeju, Korea, Nov. 2012.
    8. Youngjoo Lee, Hoyoung Yoo, and In-Cheol Park, "Small-area parallel syndrome calculation for strong BCH decoding," IEEE International Conference on Acoustics, Speech, and Signal Processing 2012 (ICASSP 2012), Kyoto, Japan, Mar. 2012, pp. 1609-1612.
    9. Youngjoo Lee, Hoyoung Yoo, Injae Yoo, and In-Cheol Park, "6.4Gb/s multi-threaded BCH encoder and decoder for multi-channel SSD controllers," IEEE International Solid-State Circuits Conference 2012 (ISSCC 2012), San Francisco, CA, USA, Feb. 2012, pp. 426-427.
    10. Jinook Song, Youngjoo Lee, Bongjin Kim, and In-Cheol Park, "8-pipeline-stage 32-bit embedded processor using dual clock domain," IEEE International SoC Design Conference 2011 (ISOCC 2011) Chip Design Contest, Jeju, Korea, Nov. 2011.
    11. Youngjoo Lee, Hoyoung Yoo, Injae Yoo, and In-Choel Park, "A 6Gbps SSD controller using low-complexity and time-interleaved BCH encoder/decoder," IEEE International SoC Design Conference 2011 (ISOCC 2011) Chip Design Contest, Jeju, Korea, Nov. 2011
    12. Youngjoo Lee, Jinook Song, and In-Cheol Park, "Statistical modeling of capacitor mismatch effects for successive approximation register ADCs," IEEE Internationsl SoC Design Conference 2011 (ISOCC 2011), Jeju, Korea, Nov. 2011.
    13. YoungJoo Lee, Goeun Lim, and In-Cheol Park, "Low-complex BPSK demodulation using absolute comparison," IEEE International Conference on Electronics, Circuits and Systems 2010 (ICECS 2010), Athens, Greece, Dec. 2010, pp. 1080-1083.
    14. YoungJoo Lee, Jinook Song, Bongjin Kim, Eunchan Kim, Goeun Lim, and In-Cheol Park, "Design of efficient embedded system," IEEE International SoC Design Conference 2010 (ISOCC 2010) Chip Design Contest, Incheon, Korea, Nov. 2010.
    15. YoungJoo Lee and In-Cheol Park, "Capacitor array structure and switching control scheme to reduce capacitor mismatch effects for SAR analog-to-digital converters," IEEE International Symposium on Circuits and Systems 2010 (ISCAS 2010), Paris, France, May 2010, pp. 1464-1467.
    16. Tae-hwan Kim, Young-Joo Lee, and In-Cheol Park, "A scalable and programmable sound synthesizer," IEEE International Symposium on Circuits and Systems 2009 (ISCAS 2009), Taipei, Taiwan, May 2009, pp. 1855-1858.
    17. Tae-hwan Kim, Young-Joo Lee, and In-Cheol Park, "Design of a scalable sound synthesizer," IEEE International SoC Design Conference 2008 (ISOCC 2008) Chip Design Contest, Busan, Korea, Nov. 2008, pp. 60-61.

    DOMESTIC JOURNAL PAPERS

    1. Youngjoo Lee, Jihyuck Jo and In-Cheol Park, "Core-A: High-performance 32-bit embedded RISC processor," The Magazine of the IEEK, vol. 40, no. 9, pp. 34-41, Sep. 2013.

    DOMESTIC CONFERENCE PAPERS

    1. Youngjoo Lee, Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo, and In-Cheol Park, "A 7.34Gb/s (70528, 65536) concatenated-BCH encoder using two-dimensional encoding scheme," IEEK Summer Conference 2013, Jeju, Korea, June 2013, pp. 17-20.
    2. Hoyoung Yoo, Youngjoo Lee, and In-Cheol Park, "Comparison between BCH and RS decoders for high performance solid-state drive," IEEK Summer Conference 2012, Jeju, Korea, June 2012, pp. 705-708.
    3. Hoyoung Yoo, Youngjoo Lee, and In-Cheol Park, "Implementation of generator for various area-efficient high-performance Reed-Solomon decoders," IEEK Fall Conference 2011, Daejeon, Korea, Nov. 2011, pp. 450-453.
    4. YoungJoo Lee, Jinook Song, Bongjin Kim, Eunchan Kim, Goeun Lim, and In-Cheol Park, "Implementation of efficient embedded environment adopting on-chip debug system," IEEK Summer Conference 2010, Jeju, Korea, July 2010, pp. 630-633.
    5. YoungJoo Lee, Tae-hwan Kim, Kangwoo Park, Goeun Lim, and In-Cheol Park, "A fully-integrated reader system for mobile UHF RFID," The 17th Korean Conference on Semiconductors, Daegu, Korea, Feb. 2010, pp. 324-326.

PATENTS

  1. [Pending] Youngjoo Lee, Bongjin Kim, Jaehwan Jung, and In-Cheol Park, "Minimum value calculator," Korea 10-2014-0180044
  2. [Pending] Jaehwan Jung, Youngjoo Lee, Saedong Yeo, and In-Cheol Park, "Method of approximating minimum value," Korea 10-2014-0180043
  3. [Pending] Youngjoo Lee, Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo, and In-Cheol Park, "Concatenated BCH decoder and concatenated BCH decoding method," Korea 10-2013-0123428
  4. [Pending] Youngjoo Lee, Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo, and In-Cheol Park, "Concatenated BCH encoding circuit, storage device and storage system including the same," Korea 10-2012-0143289
  5. [Pending] Youngjoo Lee, WonHee Son, Hoyoung Yoo, and In-Cheol Park, "BCH decoder, memory system having the same and decoding method," Korea 10-2012-0142739
  6. Jaehwan Jung, Youngjoo Lee, Bongjin Kim, and In-Cheol Park, "Decoding method and method of operating memory system including the same," Korea 10-1482684
  7. Youngjoo Lee, Hoyoung Yoo, Injae Yoo, and In-Cheol Park, "Multi-threaded BCH encoder, BCH decoder, storage device and storage system," Korea 10-1307792
  8. Youngjoo Lee, Hoyoung Yoo, and In-Cheol Park, "BCH decoder, memory system having the same and decoding method," Korea 10-1267958
  9. Youngjoo Lee, Hoyoung Yoo, and In-Cheol Park, "RS decoder, memory system having the same and decoding method," Korea 10-1226439
  10. Hoyoung Yoo, Youngjoo Lee, and In-Cheol Park, "BCH decoder, memory system having the same and BCH decoding method," Korea 10-1190522
  11. Youngjoo Lee, Hoyoung Yoo, and In-Cheol Park, "BCH decoder, memory system having the same and BCH decoding method," Korea 10-1154923
  12. Youngjoo Lee, Hoyoung Yoo, and In-Cheol Park, "BCH decoder, memory system having the same and BCH decoding method," Korea 10-1126359
  13. Youngjoo Lee and In-Cheol Park, "BPSK demodulation apparatus and method thereof using absolute comparison," Korea 10-1022419
  14. Tae-hwan Kim, Young-Joo Lee, and In-Cheol Park, "Apparatus of supporting delay access, method of supporting delay access and sound synthesis apparatus of supporting delay access," Korea 10-0941081
  15. Tae-hwan Kim, Young-Joo Lee, and In-Cheol Park, "Programmable sound synthesis apparatus and programmable sound synthesis method," Korea 10-0968090

AWARDS

  1. IEEE International SoC Design Conference 2013 (ISOCC 2013)
    - IEEE SSCS Seoul Chapter Best Demo Award
    - Youngjoo Lee, Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo, and In-Cheol Park, "Energy-efficient high-throughput iterative concatenated-BCH decoder for MLC flash memory"
  2. Qualcomm Innovation Award, 2013
  3. Excellence in Research, 2012 (KAIST EE)
  4. Kim Choong-Ki Award: Research Excellence Award, 2011 (KAIST EE)
  5. IEEE International SoC Design Conference 2011 (ISOCC 2011)
    - IEEE SSCS Seoul Chapter Best Paper Award
    - Jinook Song, Youngjoo Lee, Bongjin Kim, and In-Cheol Park, "8-Pipeline-Stage 32-bit Embedded Processor Using Dual Clock Domain"
  6. Korean Intellectual Property Office (KIPO) IP Design Contest, 2011
    - Special Award
    - Youngjoo Lee, Hoyoung Yoo and Injae Yoo, "오류에 강인한 다채널 대용량 MLC SSD 컨트롤러의 설계"
  7. Korean Intellectual Property Office (KIPO) IP Design Contest, 2008
    - Bronze Medal
    - Tae-Hwan Kim and Young-Joo Lee, "Scalable Sound Synthesis System"

EXPERIENCE

  1. Samsung Advanced Institute of Technology (SAIT) - Internship
    - 2009 Summer
    - System Architecture Laboratory, RP-core team
    - Development an efficient bus architecture for the multi-core system
  2. Exchange Student Program
    - 2006
    - UTT, France
  3. A member of KAIST Chorus
    - 2003 ~ 2007
    - President (2005)
  4. ISOTECH - Internship
    - 2004 Winter
    - Development the Laser-glucometer

 

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