International Journal Papers

2019

  • Jaewoong Choi, Byeong Yong Kong and In-Cheol Park, "Retrain-less Weight Quantization for Multiplier-less Convolutional Neural Networks," IEEE Transactions on Circuits and Systems-I: Regular Papers , accepted for publication.
  • Byeong Yong Kong, Jooseung Lee, and In-Cheol Park, "Low-Latency Multi-Touch Detector Based on Concurrent Processing of Redesigned Overlap Split and Connected Component Analysis," IEEE Transactions on Circuits and Systems-I: Regular Papers, accepted for publication.
  • Seokha Hwang, Seungsik Moon, Jaehwan Jung, Daesung Kim, In-Cheol Park, Jeongseok Ha, and Youngjoo Lee, "Energy-efficient Symmetric BC-BCH Decoder Architecture for Mobile Storages," IEEE Transactions on Circuits and Systems-I: Regular Papers, accepted for publication.
  • Byeong Yong Kong and In-Cheol Park, "A 120-mW 0.16-ms-Latency Connectivity-Scalable Multiuser Detector for Interleave Division Multiple Access," IEEE Transactions on Circuits and Systems-II: Express Briefs, accepted for publication.
  • 2018

  • Byeong Yong Kong and In-Cheol Park, "A Memory-Efficient IDMA Architecture Based on On-the-Fly Despreading," IEEE Journal of Solid-State Circuits, vol. 53, no. 11, pp. 3327-3337, Nov. 2018.
  • Youngjoo Lee, In-Cheol Park, and Hoyoung Yoo, "Area-optimized syndrome calculation for Reed-Solomon decoder," Journal of Semiconductor Technology and Science, vol. 18, no. 5, pp. 609-615, Oct. 2018.
  • Byeong Yong Kong and In-Cheol Park, "Hybrid Sorting Architecture for Low-Latency Successive Cancellation List Decoding of Polar Codes," Journal of Semiconductor Technology and Science, vol. 18, no. 5, pp. 593-601, Oct. 2018.
  • Daesung Kim and In-Cheol Park, "A Fast Successive Cancellation List Decoder for Polar Codes with an Early Stopping Criterion," IEEE Transactions on Signal Processing, vol. 66, no. 18, pp. 4971 - 4979, Sep. 2018.
  • Jihyuck Jo, Suchang Kim and In-Cheol Park, "Energy-efficient Convolution Architecture Based on Rescheduled Dataflow," IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 65, no. 12, pp. 4196-4207, Jun. 2018.
  • Daesung Kim, Injae Yoo, and In-Cheol Park, "Fast Low-Complexity Triple-Error-Correcting BCH Decoding Architecture," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 65, no. 6, pp. 764-768, Jun. 2018.
  • Jihyuck Jo, Soyoung Cha, Dayoung Rho and In-Cheol Park, "DSIP: A Scalable Inference Accelerator for Convolutional Neural Networks," IEEE Journal of Solid-State Circuits, vol. 53, no. 2, pp. 605-618, Feb. 2018.
  • 2017

  • Jaejoon Choi and In-Cheol Park, "Improved Successive-Cancellation Decoding of Polar Codes Based on Recursive Syndrome Decomposition," IEEE Communications Letters, vol. 21, no. 11, pp. 2344-2347, Nov. 2017.
  • Injae Yoo, Jihyuck Jo, Youngjin Ju and In-Cheol Park, "Unidirectional Ring Ethernet and Media Access Controller with Automatic Relaying for Low-complexity In-vehicle Control Network," Journal of Semiconductor Technology and Science, vol. 17, no. 5, pp. 697-708, Oct. 2017.
  • Jihyuck Jo and In-Cheol Park, "Low-Latency Low-Cost Architecture for Square and Cube Roots," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E100-A, no. 9, pp. 1951-1955, Sep. 2017.
  • Injae Yoo and In-Cheol Park, "Low-Power LDPC-CC Decoding Architecture Based on Integration of Memory Banks," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 64, no. 9, pp. 1057-1061, Sep. 2017.
  • Byeong Yong Kong and In-Cheol Park, "Improved Sorting Architecture for K-Best MIMO Detection," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 64, no. 9, pp. 1042-1046, Sep. 2017.
  • Youngjoo Lee, Taehyoun Oh, and In-Cheol Park, "Mismatch-tolerant capacitor array structure for junction-splitting SAR analog-to-digital conversion," Journal of Semiconductor Technology and Science, vol. 17, no. 3, pp. 387-399, Jun. 2017.
  • Jaehwan Jung and In-Cheol Park, "Multi-Bit Flipping Decoding of LDPC Codes for NAND Storage Systems," IEEE Communications Letters, vol. 21, no. 5, pp. 979-982, May 2017.
  • Jooseung Lee and In-Cheol Park, "High-Performance Low-Area Video Up-Scaling Architecture for 4K UHD Video," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 64, no. 4, pp. 437-441, Apr. 2017.
  • Saedong Yeo and In-Cheol Park, "Improved Hard-Reliability based Majority-Logic Decoding for Non-Binary LDPC Codes," IEEE Communications Letters, vol. 21, no. 2, pp. 230-233, Feb. 2017.
  • 2016

  • Hoyoung Yoo and In-Cheol Park, "Efficient Pruning for Successive-Cancellation Decoding of Polar Codes," IEEE Communications Letters, vol. 20, no. 12, pp. 2362-2365, Dec. 2016.
  • Jaejoon Choi, Jaehwan Jung, and In-Cheol Park, "Area-Efficient Approach for Generating Quantized Gaussian Noise," IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 63, no. 7, pp. 1005-1013, Jul. 2016.
  • Byeong Yong Kong, Hoyoung Yoo, and In-Cheol Park, "Efficient Sorting Architecture for Successive-Cancellation-List Decoding of Polar Codes," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 63, no. 7, pp. 673-677, Jul. 2016.
  • B.Y. Kong and I.-C. Park, "Fast Detection for Spatial Modulation MIMO Based on Cost Estimation," Electronics Letters, vol. 52, no. 8, pp. 671-673, Apr. 2016.
  • Hoyoung Yoo, Youngjoo Lee, and In-Cheol Park, "Low-Power Parallel Chien Search Architecture Using a Two-Step Approach," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 63, no. 3, pp. 269-273, Mar. 2016.
  • Youngjoo Lee, Jaehwan Jung, and In-Cheol Park, "Energy-Scalable 4KB LDPC Decoding Architecture for NAND-Flash-Based Storage Systems," IEICE Transactions on Electronics, vol. E99-C, no. 2, pp. 293-301, Feb. 2016.
  • Jihyuck Jo, Hoyoung Yoo, and In-Cheol Park, "Energy-Efficient Floating-Point MFCC Extraction Architecture for Speech Recognition Systems," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 2, pp. 754-758, Feb. 2016.
  • 2015

  • Injae Yoo, Bongjin Kim, and In-Cheol Park, "Reverse Rate Matching for Low-Power LTE-Advanced Turbo Decoders," IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 62, no. 12, pp. 2920-2928, Dec. 2015.
  • Jaehwan Jung, Hoyoung Yoo, Youngjoo Lee, and In-Cheol Park, "Efficient Parallel Architecture for Linear Feedback Shift Registers," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 62, no. 11, pp. 1068-1072, Nov. 2015.
  • Hoyoung Yoo and In-Cheol Park, "Partially Parallel Encoder Architecture for Long Polar Codes," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 62, no. 3, pp. 306-310, Mar. 2015.
  • Youngjoo Lee, Bongjin Kim, Jaehwan Jung, and In-Cheol Park, "Low-Complexity Tree Architecture for Finding the First Two Minima," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 62, no. 1, pp. 61-64, Jan. 2015.
  • 2014

  • Jaehwan Jung, Youngjoo Lee, and In-Cheol Park, "Area-Efficient Method to Approximate Two Minima for LDPC Decoders," Electronics Letters, vol. 50, no. 23, pp. 1701-1702, Nov. 2014.
  • Injae Yoo, Bongjin Kim, and In-Cheol Park, "Tail-Overlapped SISO Decoding for High-Throughput LTE-Advanced Turbo Decoders," IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 61, no. 9, pp. 2711-2720, Sep. 2014.
  • Byeong Yong Kong, Jihyuck Jo, Hyewon Jeong, Mina Hwang, Soyoung Cha, Bongjin Kim, and In-Cheol Park, "Low-Complexity Low-Latency Architecture for Matching of Data Encoded With Hard Systematic Error-Correcting Codes," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 22, no. 7, pp. 1648-1652, Jul. 2014.
  • Youngjoo Lee and In-Cheol Park, "Single-Step Glitch-Free NAND-Based Digitally Controlled Delay Lines Using Dual Loops," Electronics Letters, vol. 50, no. 13, pp. 930-932. Jun. 2014.
  • Youngjoo Lee, Hoyoung Yoo, Injae Yoo, and In-Cheol Park, "High-Throughput and Low-Complexity BCH Decoding Architecture for Solid-state Drives," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 22, no. 5, pp. 1183-1187, May 2014.
  • 2013

  • Hoyoung yoo, Jaehwan Jung, Jihyuck Jo, and In-Cheol Park, "Area-Efficient Multimode Encoding Architecture for Long BCH Codes," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 60, no. 12, pp. 872-876, Dec. 2013.
  • Youngjoo Lee, Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo, and In-Cheol Park, "A 2.74-pJ/bit, 17.7-Gb/s Iterative Concatenated-BCH Decoder in 65-nm CMOS for NAND Flash Memory," IEEE Journal of Solid-State Circuits, vol. 48, no. 10, pp. 2531-2540, Oct. 2013.
  • Byeong Yong Kong and In-Cheol Park, "Efficient Tree-Traversal Strategy for Soft-Output MIMO Detection Based on Candidate-Set Reorganization," IEEE Communications Letters, vol. 17, no. 9, pp. 1758-1761, Sep. 2013.
  • Bongjin Kim and In-Cheol Park, "Area-Efficient QC-LDPC Decoder Architecture Based on Stride Scheduling and Memory Bank Division," IEICE Transactions on Communications, vol. E96-B, no. 7, pp. 1772-1779, Jul. 2013.
  • Bongjin Kim, Injae Yoo, and In-Cheol Park, "Low-Complexity Parallel QPP Interleaver Based on Permutation Patterns," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 60, no. 3, pp. 162-166, Mar. 2013.
  • B.Y. Kong and I.-C. Park, "Hardware-Efficient Tree Expansion for MIMO Symbol Detection," Electronics Letters, vol. 49, no. 3, pp. 226-228, Jan. 2013.
  • 2012

  • Injae Yoo, Bongjin Kim, and In-Cheol Park, "Immediate Exchange of Extrinsic Information for High-Throughput Turbo Decoding," IEEE Communications Letters, vol. 16, no. 12, pp. 2048-2051, Dec. 2012.
  • Kangwoo Park and In-Cheol Park, "Low-Complexity Tone Reservation for PAPR Reduction in OFDM communication Systems," IEEE Transactions on Very Large Scale Integration Systems, vol. 20, no. 10, pp. 1919-1923, Oct. 2012.
  • Byeong Yong Kong and In-Cheol Park, "FIR Filter Synthesis Based on Interleaved Processing of Coefficient Generation and Multiplier-Block Synthesis," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 31, no. 8, pp. 1169-1179, Aug. 2012.
  • 2011

  • Tae-Hwan Kim and In-Cheol Park, "Efficient Pruning for Infinity-Norm Sphere Decoding Based on Schnorr-Euchner Enumeration," IEICE Transactions on Communications, vol. E94-B, no. 9, pp. 2677-2680, Sep. 2011.
  • Youngjoo Lee, Hoyoung yoo, and In-Cheol Park., "Low-Complexity Parallel Chien Search Structure Using Two-Dimensional Optimization," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 58, no. 8, pp. 522-526, Aug. 2011.
  • H. Yoo, Y. Lee, and I.-C. Park., "Area-Efficient Syndrome Calculation for Strong BCH Decoding," Electronics Letters, vol. 7, no. 2, pp. 107-108, Jan. 2011.
  • 2010

  • In-Cheol Park and Tae-Hwan Kim, "Multiplier-Less and Table-Less Linear Approximation for Square-Related Functions," IEICE Transactions on Infomation and Systems, vol. E93-D, no. 11, pp. 2979-2988, Nov. 2010.
  • Tae-Hwan Kim and In-Cheol Park, "Small-Area and Low-Energy K-Best MIMO Detector Using Relaxed Tree Expansion and Early Forwarding," IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 57, no. 10, pp. 2753-2761, Oct. 2010.
  • Jinook Song and In-Cheol Park, "Spur-Free MASH Delta-Sigma Modulation," IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 57, no. 9, pp. 2426-2437, Sep. 2010.
  • Tae-Hwan Kim and In-Cheol Park, "High-Throughput and Area-Efficient MIMO Symbol Detection Based on Modified Dijkstra's Search," IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 57, no. 7, pp. 1756-1766, Jul. 2010.
  • Tae-Hwan Kim, Young-Joo Lee, and In-Cheol Park, "Design of a Scalable and Programmable Sound Synthesizer," IEEE Transactions on Very Large Scale Integration Systems, vol. 18, no. 6, pp. 875-886, Jun. 2010.
  • Minsoo Rhu and In-Cheol Park, "Optimization of Arithmetic Coding for JPEG2000," IEEE Transactions on Circuits and Systems for Video Technology, vol. 20, no. 3, pp. 446-451, Mar. 2010.
  • 2009

  • Jinook Song and In-Cheol Park, "Pipelined Discrete Wavelet Transform Architecture Scanning Dual Lines," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 56, no. 12, pp. 916-920, Dec. 2009.
  • Ji-Hoon Kim and In-Cheol Park, "Bit-Level Extrinsic Information Exchange Method for Double-Binary Turbo Codes," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 56, no. 1, pp. 81-85, Jan. 2009.
  • 2008

  • Tae-Hwan Kim and In-Cheol Park,"Low-Power and High-Accurate Synchronization for IEEE 802.16d Systems," IEEE Transactions on Very Large Scale Integration Systems, vol. 16, no. 12, pp. 1620-1630, Dec. 2008.
  • Jeong-Ho Han and In-Cheol Park, "FIR Filter Synthesis Considering Multiple Adder Graphs for a Coefficient," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems: Short Papers, vol. 27, no. 5, pp. 958-962, May 2008.
  • Ji-Hoon Kim and In-Cheol Park, "Double-Binary Circular Turbo Decoding Based on Border Metric Encoding," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 55, no. 1, pp. 79-83, Jan. 2008.
  • B. Kim and I.-C. Park, "K-Best MIMO Detection Based on Interleaving of Distributed Sorting," Electronics Letters, vol. 44, no. 1, pp. 42-43, Jan. 2008.
  • 2007

  • Ji-Hoon Kim and In-Cheol Park, "Long-Point FFT Processing Based on Twiddle Factor Table Reduction,"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences., vol.E90-A, no.11, pp.2526-2532, Nov. 2007.
  • Sung-Won Lee, Ki-Seok Kwon, and In-Cheol Park,"Pipelined Cartesian-to-Polar Coordinate Conversion Based on SRT Division," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol.54, no.8, pp.680-684, Aug. 2007.
  • Myoung-Cheol Shin and In-Cheol Park,"SIMD Processor-Based Turbo Decoder Supporting Multiple Third-Generation Wireless Standards,"IEEE Transactions on Very Large Scale Integration Systems, vol.15, no.7, pp.801-810, July 2007.
  • Yongseok Yi and In-Cheol Park,"High-Speed H.264/AVC CABAC Decoding,"IEEE Transactions on Circuits and Systems for Video Technology, vol.17, no.4, pp.490-494, Apr. 2007
  • Hyun-Yong Lee and In-Cheol Park, "Balanced Binary-Tree Decomposition for Area-Efficient Pipelined FFT Processing," IEEE Transactions on Circuits and Systems-I: Regular Papers, vol.54, no.4, pp.889-900, Apr. 2007.
  • Chung-Hyo Kim and In-Cheol Park,"Parallel Decoding of Context-Based Adaptive Binary Arithmetic Codes Based on Most Probable Symbol Prediction," IEICE Transactions on Information & Systems, vol.E90-D, no.2, pp.609-612, Feb. 2007.
  • 2006

  • Dong-Soo Lee and In-Cheol Park, "Low-Power Log-MAP Decoding Based on Reduced Metric Memory Access," IEEE Transactions on Circuits and Systems-I: Regular Papers, vol.53, no.6, pp.1244-1253, June 2006.
  • Se-Hyeon Kang and In-Cheol Park, "Loosely Coupled Memory-Based Decoding Architecture for Low Density Parity Check Codes," IEEE Transactions on Circuits and Systems-I: Regular Papers, vol.53, no.5, pp.1045-1056, May 2006.
  • S.-I. Park and I.-C. Park, "Low Complexity Motion Estimation Utilising Spatial Correlation," Electronics Letters, vol.42, no.9, pp.523-525, Apr. 2006.
  • Hye-Mi Choi, Ji-Hoon Kim, and In-Cheol Park, "Low-Power Hybrid Turbo Decoding Based on Reverse Calculation," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences., vol.E89-A, no.3, pp.782-789, Mar. 2006.
  • 2005

  • Jong-Yeol Lee, Seong-Ik Cho, and In-Cheol Park, "Performance Enhancement of Embedded Software Based on New Register Allocation Technique," Microprocessor and Microsystems, vol. 29, pp.177-187, May 2005.
  • Jae Hoon Shim, In-Cheol Park, and Beomsup Kim, "Hybrid Delta-Sigma Modulators with Adaptive Calibration," IEEE Transactions on Circuits and Systems-I: Regular Papers, vol.52, no.5, pp.885-893, May 2005.
  • Jae Hoon Shim, In-Cheol Park, and Beomsup Kim, "A Third-Order Sigma-Delta Modulator in 0.18um CMOS with Calibrated Mixed-Mode Integrators," IEEE Journal of Solid-State Circuits, vol.40, no.5, pp.918-925, Apr. 2005.
  • K. Kim and I.-C. Park, "Combined Image Signal Processing for CMOS Image Sensors," Electronics Letters, vol.41, no.9, pp.15-16, Apr. 2005.
  • Hyeong-Ju Kang and In-Cheol Park, "SAT-Based Unbounded Symbolic Model Checking," IEEE Transactions on Computer-Aided Design, vol.24, no.2, pp.129-140, Feb. 2005.
  • Dong-Soo Lee and In-Cheol Park, "A Low-Complexity Stopping Criterion for Iterative Turbo Decoding," IEICE Transactions on Communications, vol.E88-B, no.1, pp.399-401, Jan. 2005.
  • 2003

  • Seong-Il Park, Yongseok Yi, and In-Cheol Park, "High Performance Memory Mode Control for HDTV Decoders," IEEE Transactions on Consumer Electronics, vol. 49, no. 4, pp. 1348-1353, Nov. 2003.
  • Young-Don Bae, Seong-Il Park, and In-Cheol Park, "A Single-Chip Programmable Platform Based on a Multithreaded Processor and Configurable Logic Clusters," IEEE Journal of Solid-State Circuits, vol. 38, no. 10, pp. 1703-1711, Oct. 2003.
  • Sung-Won Lee and In-Cheol Park, "Quadrature Direct Digital Frequency Synthesis using Fine-Grain Angle Rotation Technique," IEE Electronics Letters, vol. 39, no. 17, pp. 1235-1237, Aug. 2003.
  • J.-Y. Lee and I.-C. Park, "Address Code Generation for DSP Instruction-Set Architectures," ACM Transactions on Design Automation of Electronic Systems, vol. 8, no. 3, pp. 384-395, July 2003.
  • Myoung-Cheol Shin and In-Cheol Park, "Processor-Based Turbo Interleaver for multiple Third-Generation Wireless Standards," IEEE Communications Letters, vol. 7, no. 5, pp. 210-212, May 2003.
  • Sung-Won Lee and In-Cheol Park, "A Low-Power Variable Length Decoder for MPEG-2 Based on Successive Decoding of Short Codewords," IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Procesing, vol. 50, no. 2, pp. 73-82, Feb. 2003.
  • Jong-Yeol Lee and In-Cheol Park, "Timed Compiled-Code Functional Simulation of Embedded Software for Performance Analysis of SOC Design," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, no. 1, pp. 1-14, Jan. 2003.
  • 2002

  • In-Cheol Park and Hyeong-Ju Kang, "Digital Filter Synthesis Based on an Algorithm to Generate All Minimal Signed Digit Representations," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 21, no. 12, pp. 1525-1529, Dec. 2002.
  • Jong-Yeol Lee and In-Cheol Park, "Loop and Address Code Optimization for Digital Signal Processors," IEICE Transactions on Fundamentals, vol. E85-A, no. 6, pp. 1408-1414, June 2002.
  • 2001

  • Hannsoo Kim and In-Cheol Park, "High-Performance and Low-Power Memory Interface Architecture"IEEE Transactions on Circuits and Systems for Video Technology, Vol. 11, No. 11, pp.1160-1170, Novemver 2001.
  • Yongseok Yi and In-Cheol Park, "A Fixed-Point Mpeg Audio Processor Operating at Low Frequency," IEEE Transactions on Consumer Electronics, Vol. 47, No. 4, pp. 779-786, November 2001.
  • Hyeong-Ju Kang and In-Cheol Park, "FIR-Filter Synthesis Algorithms for Minimizing the Delay and the Number of Adders," IEEE Transations on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 48, No. 8, pp. 770-777, August 2001.
  • S.-Y. Kim, H. Kim and I.-C. Park, "Path Metric Memory Management For Minimising Interconnections In Viterbi Decoders," Electronics Letters, Vol. 37, No. 14, pp. 925-926, July 2001.
  • 2000

  • Young-Doo Choi, In-Cheol Park, and Chong-Min Kyung, "CLASSIC : An O(n2)-Heuristic Algorithm for Microcode Bit Optimization Based on Incompleteness Relations," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, May 2000.
  • Jin-Hyuk Yang, Byoung-Woon Kim, Sang-Joon Nam, Young-Su Kwon, Dae-Hyun Lee, Jong-Yeol Lee, Chan-Soo Hwang, Yong-Hoon Lee, Seung-Ho Hwang, In-Cheol Park, and Chong-Min Kyung, "MetaCore : An Application-Specific DSP Development System," IEEE Transactions on Very Large Scale Integration Systems, Vol.8, No. 2, pp.173~183, April 2000.
  • Sung-Won Lee and In-Cheol Park, "Low-Power Variable Length Decoder Considering Successive Codewords," Electronics Letters, vol.36, No. 5, pp.440~442, March 2000.
  • 1999

  • Hansoo Kim, In-Cheol Park, "Array Address Translation for SDRAM-Based Video Processing Applications," Electronics Letters, vol.35, no. 22, pp.1929~1931, 1999.
  • Seunjeogn Lee, In-Cheol Park, and Chong-Min Kyung, "Path-Based Branch Prediction using Signature Analysis," Microprocessors and Microsystems, 1999.
  • Young-Su Kwon, In-Cheol Park, and Chong-Min Kyung, ""A New Single-Clock Flip-Flop for Half-Swing Clocking,"IEICE Transactions on Funmentals of Electronics, Communications and Computer Sciences, Vol.E82-A, No.11, pp.2521-2526, November 1999.
  • Sang-Joon Nam, In-Cheol Park, and Chong-Min Kyung, "Improving Dictionary-based Code Compression in VLIW Architectures,"IEICE Transactions on Fundamentals of Electronics, Communications, and Computer Science, Vol.E82-A, No.11, pp.2318-2324, November 1999.
  • Jin-Hyuk Yang, In-Cheol Park, and Chong-Min Kyung, "Path-Classified Trace Cache for Improving Hit Ratio in Wide-Issue Processor," IEICE Transactions on Information and Systems, Vol.E82-D, No.10, pp.1338-1343, October 1999.
  • Seung-June Kyung, Kwang-Su Seong, In-Cheol Park, and Chong-Min Kyung, "A Hierarchical Circuit Clustering Algorithm with Stable Performance," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E82-A, No.9, pp.1987-1993, September 1999.
  • Hoon Choi, Jong-Sun Kim, Chi-Won Yoon, In-Cheol Park, and Chong-Min Kyung, "Synthesis of Application Specific Instructions for Embedded DSP Software," IEEE Transactions on Computers, Vol.48, No.6, pp.603-614, June 1999.
  • Sang-Joon Nam, In-Cheol Park, and Chong-Min Kyung, "Fast Precise Interrupt Handling without Associative Searching in Multiple Out-Of-Order Issue Processors," IEICE Transactions on Information and Systems, Vol. E82-D, No. 3, pp.645 - 653, March 1999.
  • 1998

  • Hansoo Kim, Joung-Youn Kim, Seung Ho Hwang, In-Cheol Park, and Chong-Min Kyung, "Digital Signal Processor with Efficient RGB Interpolation and Histogram Accumulation," IEEE Transactions on Consumer Electronics, Vol. 44, No. 4, P. 1389 - 1395, November 1998.
  • Bongil Park, Myoungcheol Shin, In-Cheol Park, and Chong-Min Kyung, "Radix-4 Multiplier with Regular Layout Structure," Electronics Letters, Vol. 34, No. 15, P. 1446 - 1447, July 1998.
  • Joon-Seo Yim, In-Cheol Park, and Chong-Min Kyung, "Datapath Layout Optimization using Genetic Algorithm and Simulated Annealing," IEE Proceedings - Computers and Digital Techniques, Vol. 145, No. 2, P. 135 - 141, March 1998.
  • 1997

  • Joon-Seo Yim, Changjae Park, Wooseung Yang, Hunseung Oh, Hoon Choi, Seungjong Lee, Nara Won, In-Cheol Park, and Chong-Min Kyung, "Design Verification of Complex Microprocessor," Journal of Circuits, Systems and Computers, Vol. 7, No. 4, P. 301 - 308, August 1997.
  • Joon-Seo Yim, In-Cheol Park, and Chong-Min Kyung, "SEWD:A Cache Architecture to Speed up the Misaligned Instruction Prefetch," IEICE Transactions on Information and Systems, Vol.E80-D, No. 7, P. 742 - 745, July 1997.