research >> international journal papers

2018

  • [Accepted] Byeong Yong Kong and In-Cheol Park, "A Memory-Efficient IDMA Architecture Based on On-the-Fly Despreading," IEEE Journal of Solid-State Circuits, to be published.
  • [Accepted] Byeong Yong Kong and In-Cheol Park, "Hybrid Sorting Architecture for Low-Latency Successive Cancellation List Decoding of Polar Codes," Journal of Semiconductor Technology and Science, to be published.
  • [Accepted] Jihyuck Jo, Suchang Kim and In-Cheol Park, "Energy-efficient Convolution Architecture Based on Rescheduled Dataflow," IEEE Transactions on Circuits and Systems-I: Regular Papers, to be published.
  • Daesung Kim and In-Cheol Park, "A Fast Successive Cancellation List Decoder for Polar Codes with an Early Stopping Criterion," IEEE Transactions on Signal Processing, vol. 66, no. 18, pp. 4971 - 4979, Sep. 2018.
  • Daesung Kim, Injae Yoo, and In-Cheol Park, "Fast Low-Complexity Triple-Error-Correcting BCH Decoding Architecture," IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 65, no. 6, pp. 764-768, Jun. 2018.
  • Jihyuck Jo, Soyoung Cha, Dayoung Rho and In-Cheol Park, "DSIP: A Scalable Inference Accelerator for Convolutional Neural Networks," IEEE Journal of Solid-State Circuits, vol. 53, no. 2, pp. 605-618, Feb. 2018.

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2000

  • Young-Doo Choi, In-Cheol Park, and Chong-Min Kyung, "CLASSIC : An O(n2)-Heuristic Algorithm for Microcode Bit Optimization Based on Incompleteness Relations," IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, May 2000.
  • Jin-Hyuk Yang, Byoung-Woon Kim, Sang-Joon Nam, Young-Su Kwon, Dae-Hyun Lee, Jong-Yeol Lee, Chan-Soo Hwang, Yong-Hoon Lee, Seung-Ho Hwang, In-Cheol Park, and Chong-Min Kyung, "MetaCore : An Application-Specific DSP Development System," IEEE Transactions on Very Large Scale Integration Systems, Vol.8, No. 2, pp.173~183, April 2000.
  • Sung-Won Lee and In-Cheol Park, "Low-Power Variable Length Decoder Considering Successive Codewords," Electronics Letters, vol.36, No. 5, pp.440~442, March 2000.

1999

1998

1997

  • Joon-Seo Yim, Changjae Park, Wooseung Yang, Hunseung Oh, Hoon Choi, Seungjong Lee, Nara Won, In-Cheol Park, and Chong-Min Kyung, "Design Verification of Complex Microprocessor," Journal of Circuits, Systems and Computers, Vol. 7, No. 4, P. 301 - 308, August 1997.
  • Joon-Seo Yim, In-Cheol Park, and Chong-Min Kyung, "SEWD:A Cache Architecture to Speed up the Misaligned Instruction Prefetch," IEICE Transactions on Information and Systems, Vol.E80-D, No. 7, P. 742 - 745, July 1997.

 

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