AI Processor

A new AI architecture, including deep-learning specific instruction-set processor, energy-efficient computer arithmetic, high-performance computing system, and processing in memory (PIM) architecture
Read more...

VLSI Architecture for Communication

Efficient hardware architecture of error correction codes such as LDPC and Polar codes, and MIMO detection algorithm for next generation communication standard

Multimedia Application Processor

Feature extraction for speech recognition, image compression, and video upscaling algorithm and architecture

Embedded SoC

Sensor-node platform for smart IT applications, multi-core and multi-chip processing system, and system software
Read more...

Others

All-digital PLL, AD converter, and high-level synthesis in CAD

ICSL News

Jeongmin Kim's paper is accepted by IEEE Transactions on Circuits and Systems-I: Regular Papers. (2024.08.)
Kangjoon Choi's paper is accepted by IEEE Transactions on Circuits and Systems-II: Express Briefs. (2024.04.)
Boseon Jang's paper is accepted by IEEE Transactions on Circuits and Systems-I: Regular Papers. (2024.04.)
Suchang Kim's paper is accepted by IEEE Transactions on Circuits and Systems-I: Regular Papers. (2023.02.)
Jaehyeon Park's paper is accepted by IEEE Access. (2022.08.)
Hyungjoon Bae's paper is accepted by IEEE Transactions on Computers. (2022.06.)
Seongjin Lee's paper is accepted by IEEE Transactions on Circuits and Systems-I: Regular Papers. (2022.02.)